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 ClampTM 1-Line ESD protection
PROTECTION PRODUCTS - MicroClamp Description
The Clamp series of TVS arrays are designed to protect sensitive electronics from damage or latch-up due to ESD. It is designed to replace multilayer varistors (MLVs) in portable applications such as cell phones, notebook computers, and PDA's. It features large cross-sectional area junctions for conducting high transient currents. It offers superior electrical characteristics such as lower clamping voltage and no device degradation when compared to MLVs. They offer desirable characteristics for board level protection including fast response time, low operating and clamping voltage, and no device degradation. The clampTM0501H is in a ultra-small SOD-523 package ideal for use in portable electronics such as cell phones, PDA's, notebook computers, and digital cameras. It will protect one unidirectional line operating at 5 volts. It gives the designer the flexibility to protect one line in applications where arrays are not practical. Additionally, it may be "sprinkled" around the board in applications where board space is at a premium. This device may be used to meet the ESD immunity requirements of IEC 61000-4-2, Level 4 (15kV air, 8kV contact discharge).
TM
UCLAMP0501H
Features
! Transient protection for data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact) IEC 61000-4-4 (EFT) 40A (tp = 5/50ns) Cable Discharge Event (CDE) Ultra-small SOD-523 package (1.7 x 0.9 x 0.7mm) Protects one I/O or power line Low clamping voltage Working voltage: 5V Low leakage current Solid-state silicon-avalanche technology
! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! !
Mechanical Characteristics
EIAJ SOD-523 package Molding compound flammability rating: UL 94V-0 Marking : Marking code, cathode band Packaging : Tape and Reel per EIA 481 Lead Finish: Matte tin Cellular Handsets & Accessories Cordless Phones Personal Digital Assistants (PDA's) Notebooks & Handhelds Portable Instrumentation Digital Cameras Peripherals MP3 Players
Applications
Dimensions
1.70 1.30 0.9
Schematic & PIN Configuration
0.35
0.70
Maximum Dimensions (mm)
Revision 10/08/2003 1
SOD-523 (Top View)
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UCLAMP0501H
PROTECTION PRODUCTS Absolute Maximum Rating
R ating Peak Pulse Power (tp = 8/20s) Maximum Peak Pulse Current (tp = 8/20s) ESD per IEC 61000-4-2 (Air) ESD per IEC 61000-4-2 (Contact) Lead Soldering Temperature Operating Temperature Storage Temperature Symbol Pp k Ip p V PP TL TJ TSTG Value 240 16 +/- 20 +/- 15 260 (10 sec.) -55 to +125 -55 to +150 Units Watts Amps kV C C C
Electrical Characteristics (T=25oC)
Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Forward Voltage Clamp ing Voltage Clamp ing Voltage Junction Cap acitance Symbol VRWM V BR IR VF VC VC Cj It = 1mA VRWM = 5V, T=25C IF = 10mA IPP = 5A, tp = 8/20s IPP = 16A, tp = 8/20s VR = 0V, f = 1MHz 0.80 9.8 12.5 160 6 5 Conditions Minimum Typical Maximum 5 Units V V A V V V pF
2003 Semtech Corp.
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www.semtech.com
UCLAMP0501H
PROTECTION PRODUCTS Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
10 Peak Pulse Power - Ppk (kW)
110 100 90 % of Rated Power or I PP 80 70 60 50 40 30 20 10
Power Derating Curve
1
0.1
0.01 0.1 1 10 Pulse Duration - tp (s) 100 1000
0 0 25 50 75 100 125 150 Ambient Temperature - TA (oC)
Clamping Voltage vs. Peak Pulse Current
12 10 Clamping Voltage - VC (V) 8 6 4 2 0 0 2 4 6 8 10 12 14 16 Waveform Parameters: tr = 8s td = 20s
Forward Voltage - VF (V) 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0
Forward Voltage vs. Forward Current
Waveform Parameters: tr = 8s td = 20s
4
8 Forward Current - IF (A)
12
16
Peak Pulse Current - IPP (A)
Junction Capacitance vs. Reverse Voltage
160
f = 1 MHz
ESD Clamping (8kV Contact per IEC 61000-4-2)
140 Capacitance - Cj (pF)
120
100
80
60 0 1 2 3 Reverse Voltage - VR (V) 4 5
2003 Semtech Corp.
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UCLAMP0501H
PROTECTION PRODUCTS Applications Information
Device Connection Options These TVS diodes are designed to protect one data, I/ O, or power supply line. The device is unidirectional and may be used on lines where the signal polarity is above ground. The cathode band should be placed towards the line that is to be protected. Circuit Board Layout Recommendations for Suppression of ESD. Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended: " Place the TVS near the input terminals or connectors to restrict transient coupling. " Minimize the path length between the TVS and the protected line. " Minimize all conductive loops including power and ground loops. " The ESD transient return path to ground should be kept as short as possible. " Never run critical signals near board edges. " Use ground planes whenever possible. Matte Tin Lead Finish Matte tin has become the industry standard lead-free replacement for SnPb lead finishes. A matte tin finish is composed of 100% tin solder with large grains. Since the solder volume on the leads is small compared to the solder paste volume that is placed on the land pattern of the PCB, the reflow profile will be determined by the requirements of the solder paste. Therefore, these devices are compatible with both lead-free and SnPb assembly techniques. In addition, unlike other lead-free compositions, matte tin does not have any added alloys that can cause degradation of the solder joint. Circuit Diagram
2003 Semtech Corp.
4
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UCLAMP0501H
PROTECTION PRODUCTS Outline Drawing
Land Pattern
2003 Semtech Corp.
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UCLAMP0501H
PROTECTION PRODUCTS Marking Code Ordering Information
Part Number uClamp 0501H.TCT Working Voltage 5V Device Qty per Marking Reel 5H 3,000 Reel Size 7 Inch
5H
Tape and Reel Specification
MicroClamp, uClamp and Clamp are trademarks of Semtech Corporation
Tape Specifications
Device Orientation in Tape
Contact Information
Semtech Corporation Protection Products Division 200 Flynn Rd., Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804
www.semtech.com
2003 Semtech Corp.
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